The flip-chip method for the connection of semiconductor chips to interconnect substrates has entered into frequent use in association with the increasingly small size and increasingly higher pin count of semiconductor chips. One problem encountered with this connection method is that the difference in coefficient of thermal expansion between the semiconductor chip and interconnect substrate can produce thermal stresses upon exposure to thermal shock, which results in a degraded reliability. As a consequence, in the case of semiconductor devices in which the semiconductor chip is connected by solder balls to the interconnect substrate, a resin—known as underfill material—is sealed between the semiconductor chip and interconnect substrate as a means for relaxing thermal stresses. This method, however, enlarges the mounting process and hence raises costs.
In view of this, Japanese Laid Open (Kokai or Unexamined) Patent Application Numbers Sho 63-86322 (86,322/1988) and 63-86536 (86,536/1988) teach an anisotropically electroconductive adhesive film in which column-shaped conductors are embedded in a prescribed configuration in a layer of electrically insulating adhesive. These conductors are embedded in such a manner that upon compression bonding they are insulated in the plane of the layer while providing continuity across the thickness of the layer. However, the interconnect reliability is still reduced by thermal shock even when the aforementioned anisotropically electroconductive adhesive film is used to connect the semiconductor chip to its interconnect substrate.
An object of this invention is to provide an anisotropically electroconductive adhesive film that is capable of effecting the reliable electrical connection of an electronic component, e.g., a semiconductor chip, onto an interconnect substrate. An additional object of this invention is to provide an efficient method for producing this film. A further object of this invention is to provide a semiconductor device in which an electronic component, e.g., a semiconductor chip, is electrically connected onto an interconnect substrate by the aforesaid film, wherein said semiconductor device is reliable and exhibits excellent stress relaxation when exposed to thermal shock.